Image: youtube.com · Video thumbnail: YouTube: A RISC-V CPU on an FPGA, Built Entirely by Claude Code - Icepi Zero + Silice Fire-V, No Code Typed
A RISC-V CPU on an FPGA built entirely by Claude Code
A real RISC-V processor (Silice Fire-V) running on an Icepi Zero FPGA board, built by Claude Code with no code typed by hand.
Credits
- Video channel Craig Hollabaugh Source ↗
Earliest dated source:
The full story
On an Icepi Zero, a board the size of a Raspberry Pi Zero with a Lattice ECP5 FPGA, Claude Code brought up the open-source Silice Fire-V system: a RISC-V processor, a memory controller and a hardware triangle rasteriser drawing spinning 3D cubes over HDMI.
Claude cloned the code, built the Silice compiler from source, fixed three real bugs in the new board port, and compiled and flashed the demo. Craig Hollabaugh typed no code, and it took about 45 minutes.
How it was done
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Sources
From the maker's own write-up or code. We summarise what they report; we haven't tested it ourselves.
- YouTube: A RISC-V CPU on an FPGA, Built Entirely by Claude Code - Icepi Zero + Silice Fire-V, No Code TypedVideo channel: Craig HollabaughPublished
The video by Craig Hollabaugh.