Image: reddit.com · I built an open-source bench instrument (logic analyzer + SWD probe + power rails) with Claude as my primary coding partner here's the summary:
BugBuster, an open-hardware bench instrument with logic analyser
An RP2040 and ESP32-S3 bench instrument with logic analyser, SWD probe and power rails, with Claude as main coding partner on firmware and software.
Credits
Earliest dated source:
The full story
BugBuster is an open-source, open-hardware bench instrument: an ESP32-S3 mainboard with an RP2040 add-on board giving a logic analyser, a CMSIS-DAP SWD probe and adjustable power rails, plus a desktop app, Python library and MCP server. Claude was the maker's main collaborator over several months and handled the bulk of the code, including a custom USB wire protocol kept in step across Rust, C and Python.
Claude was good at chasing subtle firmware bugs such as a TinyUSB hardware quirk and race conditions, but sometimes brought in USB patterns that are wrong on the RP2040, and the growing code needed manual refactoring. The MCP server means Claude itself can now probe I2C devices and capture logic traces with the instrument.
How it was done
Tools
Themes
Loading themes…
Sources
From a short post by the maker, so the details are as they tell them.
- Reddit: I built an open-source bench instrument (logic analyzer + SWD probe + power rails) with Claude as myReddit poster: lollokaraPosted
The maker's post on r/ClaudeAI.
If it disappears: archived copy of Reddit: I built an open-source bench instrument (logic analyzer + SWD probe + power rails) with Claude as my (opens in a new tab)
- Reddit: Plug Claude into whatever you are working onReddit poster: lollokaraPosted
The maker's later post on r/ClaudeAI with the hardware details.
If it disappears: archived copy of Reddit: Plug Claude into whatever you are working on (opens in a new tab)